For a CMOS (Complementary Metal-Oxide-Semiconductor) image sensor, a CCD (Charge Coupling Device) image sensor or other image input image sensors, as their characteristics improved the requirements of their application in digital cameras, camera-equipped cell phones, etc. increased.
The development of even better characteristics for image sensors is desired. One improved characteristic would be wider dynamic range.
For example, the prior art represented by Japanese Kokai Patent Application No. 2003-134396, Japanese Kokai Patent Application No. 2000-165754, Japanese Kokai Patent Application No. 2002-77737 and Japanese Kokai Patent Application No. Hei 5[1993]-90556 disclose solid-state image pickup devices with wider dynamic ranges. However, for the solid-state image pickup devices described in these references, it is difficult to realize a wider dynamic range while maintaining high sensitivity and a high signal to noise (S/N) ratio. The solid-state image pickup device described in Japanese Kokai Patent Application No. 2005-328493 was developed to solve this problem.
For the solid-state image pickup device described in Japanese Kokai Patent Application No. 2005-328493, the photoelectric charge flowing from the photodiode of each pixel is accumulated in a floating diffusion and an electrostatic capacitive element. As the signal for each pixel, if no photoelectrons are flowing from the photodiode, an S1 signal is read from the photoelectrons in the photodiode. If photoelectrons flow out of the photodiode, the photoelectrons in the photodiode and the photoelectrons flowing from the photodiode are merged to read an S2 signal.
For the solid-state image pickup device described in Japanese Kokai Patent Application No. 2005-328493, the floating diffusion at each pixel is connected to the gate electrode of an amplification transistor, known as a source follower. The photoelectric charge is converted to a voltage that is subjected to current amplification as the current between the source and drain of the transistor in the source follower. The signal level is held in the analog memory in the solid-state image pickup device and read for each line.
FIG. 14 is a schematic diagram illustrating a CMOS image sensor of the prior art.
Sensor array SA has plural pixels integrated in an array configuration to form a light-receiving surface. Analog memories M1 and M2 are arranged in two directions and are connected to the various lines of the array.
Analog memory M1 has two capacitors for each line. From each pixel, signal N1 is the noise level corresponding to the signal S1 and signal NS1 is the difference between signal N1 and signal S1 (N1-S1). These signals are stored in the two capacitors of analog memory M1 and then output.
Analog memory M2 has two capacitors for each line. From each pixel, signal N2 is the noise level corresponding to the signal S2 and signal NS2 as the difference between signal N2 and signal S2 (N2-S2). These signals are stored in the two capacitors of analog memory M2 and then output.
FIG. 15 is an equivalent circuit diagram illustrating the overall circuit construction of the CMOS image sensor of the prior art.
FIG. 15 illustrates an exemplary plurality of 4 pixels (Pixel) arranged in an array configuration. Each pixel (Pixel) is connected to the driving lines (φT, φS, φR, φX) controlled by row shift register SRV, power supply VDD, ground GND, etc.
Under control of column shift register SRH and driving lines (φNS1, φN1, φNS2, φN2), the signal N1, signal NS1, signal N2 and signal NS2 from each pixel (Pixel) are stored in analog memories M1 and M2 having capacitors CAP. These signals are then output. Because FIG. 15 shows an equivalent circuit diagram, the analog memories M1 and M2 are shown in one direction. In practice sensor array SA is arranged between analog memory M1 and analog memory M2 as shown in FIG. 14.
FIG. 16 is a flow chart illustrating the operation of the CMOS image sensor of the prior art. The steps of operation performed for each line are explained below.
First, as first step ST1, signal S1 is read. It is obtained by reading the signal NS1 and signal N1 to analog memory M1, followed by computing their difference.
Then, as the second step ST2, signal S2 is read. It is obtained by reading the signal NS2 and signal N2 to analog memory M2, followed by computing their difference.
Then, as the third step ST3, signal S1 and signal S2 read as mentioned previously are output.
Then, as the fourth step ST4, signal S1 is checked for each pixel. That is, as shown in the fifth step ST5, signal S1 is compared with a prescribed threshold T.
If signal S1 is below threshold T, as shown in the sixth step ST6, signal S1 is used as the pixel signal.
On the other hand, if signal S1 is above threshold T, as shown in the seventh step ST7, signal S2 is used as the pixel signal.
Then, as shown in the eighth step ST8, for the next pixel, the fifth step ST5 and thereafter are repeated.
For the CMOS image sensor having this construction, after read of signal S1 and signal S2 from each pixel, the necessary signal of signal S1 and signal S2 is determined.
Consequently, in addition to an analog memory for obtaining signal S1, an output system and an A/D converter for generating signal S1, an analog memory for obtaining signal S2, an output system and an A/D converter for generating signal S2 are needed for this construction.
Especially, the analog memory consisting of a capacitor, etc., and the A/D converter are large with respect to the overall CMOS image sensor, and this is a factor preventing miniaturization of a CMOS image sensor.
The problem to be solved is as follows: in a solid-state image pickup device with a wider dynamic range, the circuit for signal S1 and the circuit for signal S2 are arranged as similar circuits, and miniaturization of the device is difficult.